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CEA-LETI Identifies Key Enablers for Introduction of DP TechnologyAt 32 nm and beyond, Double Patterning (DP) is the key enabling technology for lithography applications. However, DP presents many challenges with regard to critical dimension (CD) and overlay interactions between the two exposures used to pattern each layer. Nikon and CEA-LETI, one of the world’s leading microelectronics research centers, have been engaged in a joint development program studying these critical relationships since early 2007. Using a leading-edge Nikon scanner in LETI’s Nanotec 300 research facility in Grenoble, France, the program has made excellent progress in validating the DP error models proposed by Nikon at the SPIE Advanced Lithography Conference in February [1], and recent investigations have also yielded valuable learning regarding topography effects on CD mean and variation [2]. DP Error Model Validation There are many ways of implementing Double Patterning technology, each with unique challenges. In the case of Line DP (a pitch splitting method where a brightfield mask is used to print semi-isolated lines), overlay error will contribute to CD error of the Space and the CD errors between the two exposures will in turn impact the Total CD Variation. The derived error model for the CD uniformity for the two populations of lines (L1 from the first patterning step and L2 from the second patterning step) is shown below in equation 1 [1]. In this equation, it is clear that the difference between the L1 and L2 CDs have a direct impact on the final CD variation. CD Line Equation:
The model was validated at CEA-LETI using wafers patterned with LETI’s standard line DP process using 177 nm ArF resist with 32 nm BARC and the following sequence:
LETI Standard Process
Figure 1. LETI standard DP process. In order to generate a variety of spaces, a different programmed overlay offset for each of the five wafers was set at step L2 as shown below (Figure 2). Overlay Offsets Set at L2
Figure 2. To generate a variety of spaces, a different programmed overlay offset for each the five wafers was used at step L2. CD results were then measured using top view CD-SEM after the second etch (E2). If we assume that the CD uniformity is the same for the two exposures where ΔCD = ΔCD1 = ΔCD2, then using the Nikon error model, the necessary parameters were calculated as follows: CD Results After E2
Figure 3. CD results obtained after the second etch (E2). "Lmeanall" and "σall" represent the CD mean and standard deviation mean considering the two line populations. CD Line Validation: If this data is grouped with previous results obtained when studying trimming time variations, and ΔCDline2 is plotted as a function of equation 1, then each line population can be considered as a normal law (Figure 4). CD Line Validation Results
Figure 4. These results successfully validate the error model for CD Line. CD Space: Subsequently, the CD of the space equation is shown below in equation 2,
Using the CD results obtained after the second etch (E2), the model of space CD error was successfully validated as well (Figure 5). CD Space Validation Results
Figure 5. These results successfully validate the error model for CD Space. Successful Error Model Validation: Together, these results fully validate the line error model for both CD Line and CD Space variation. This is very significant as it provides an accurate model with which to derive the requisite tool, mask, and process budgets to enable successful development of the CD and overlay control necessary for DP applications. Investigation of Topography Effects In addition to vital error model validation, separate investigation of topography effects on CD variation has been progressing well also. Wafers were processed to generate 45 nm features with pattern heights of 15 nm, 30 nm, and 45 nm. The wafers were then recoated and the CD of the second feature was measured after development. The mean CD as well as CD variation increased significantly, and the resist profiles were noticeably degraded with the larger topographies (Figure 6). Resist Profiles With Varied Topographies
Figure 6. Resist profiles were noticeably degraded with the larger topographies. Results showed that although below 30 nm the topography effects at Litho 2 are limited, larger topographies increase both the mean CD as well as the associated variation (Figure 7). These experiments confirmed that the thin layer stack selected for the LETI litho-etch-litho-etch process is well suited to fully satisfy the aggressive CDU requirements associated with next-generation DP applications. Topography Impacts
Figure 7. Larger topographies increase both the mean CD as well as the associated variation. The theoretically derived models for the effects of CD control and overlay upon critical dimensions have been experimentally verified through the successful Nikon and CEA-LETI partnership. This work has been vital in enabling Nikon to ensure that the generation of tools used for 32 nm Double Patterning manufacturing is more than capable of satisfying production requirements. In addition, path-finding investigations of the influence of topography in DP will provide valuable knowledge for establishment of such types of advanced processes. References 1. Andrew J. Hazelton, Shinji Wakamoto, Shigeru Hirukawa, Martin McCallum, Nobutaka Magome, Jun Ishikawa, Céline Lapeyre , Isabelle Guilmeau, Sébastien Barnola, Stéphanie Gaugiran, "Double patterning requirements for optical lithography and prospects for optical extension without double patterning", SPIE Advanced Lithography, Vol. 6924, paper 69240R, 2008. 2. Céline Lapeyre, Sébastien Barnola, Isabelle Servin, Stéphanie Gaugiran, Vincent Salvetat, Martin McCallum, Andrew J. Hazelton, "Impact of CD and overlay errors on double patterning processes", 5th International Symposium on Immersion Lithography Extensions, 22-25 September 2008, The Hague, Netherlands. |
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